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1
Data Book
AU6390
USB2.0 to ATA/ATAPI Bridge Controller Technical Reference Manual
Product Specification Preliminary Release Revision 0.9W Confidential
Aug 2005
Data sheet status
Objective specification Preliminary specification Product specification This data sheet contains target or goal specifications for product development. This data sheet contains preliminary supplementary data may be published later. data;
This data sheet contains final product specifications.
Revision History
Date Aug 2005 Revision 0.9W Description Preliminary release
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Copyright Notice Copyright 1997 - 2005 Alcor Micro Corp. All Rights Reserved. Trademark Acknowledgements The company and product names mentioned in this document may be the trademarks or registered trademarks of their manufacturers. Disclaimer Alcor Micro Corp. reserves the right to change this product without prior notice. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without prior notice.
Contact Information: Web site: http://www.alcormicro.com/ Taiwan Alcor Micro Corp. 4F, No 200 Kang Chien Rd., Nei Hu, Taipei, Taiwan, R.O.C. Phone: 886-2-8751-1984 Fax: 886-2-2659-7723 Santa Clara Office 2901 Tasman Drive, Suite 206 Santa Clara, CA 95054 USA Phone: (408) 845-9300 Fax: (408) 845-9086 Los Angeles Office 9070 Rancho Park Court Rancho Cucamonga, CA.91730 USA Phone: (909) 483-9900 Fax: (909) 944-0464
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Table of Contents
1 Introduction....................................................................... 1.1 Description......................................................................................... 1.2 Features.............................................................................................. 2 Application Block Diagram................................................. 3 Pin Assignment.................................................................. 6 6 6 7 8
4 System Architecture and Reference Design....................... 11 4.1 AU6390 Block Diagram................................................................... 11 5 Electrical Characteristics................................................... 12 5.1 Absolute Maximum Ratings........................................................... 12 5.2 Recommended Operating Conditions.......................................... 5.4 DC Electrical Characteristics for 5 volts operation.................. 12 13 5.3 General DC Characteristics............................................................ 12 5.5 USB Transceiver Characteristics................................................... 14 6 Mechanical Information...................................................... 17 7 Abbreviations.................................................................... 18
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List of Figures
2.1 Block Diagram............................................................................................... 3.1 Pin Assignment Diagram............................................................................. 7 8
4.1 AU6390 Block diagram................................................................................. 11 6.1 Mechanical Information Diagram.............................................................. 17
List of Tables
3.1 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 Pin Descriptions........................................................................................ 9 Absolute Maximum Ratings................................................................... 12 Recommended Operating Conditions.................................................. 12 General DC Characteristics.................................................................... 12 DC Electrical Characteristics of 3.3V I/O Cells........................... 13 Recommended Operation Conditions.................................................. 14 Static characteristicDigital in ........................................................... 14 Static characteristicAnalog I/O pinsDP/DM.............................. 15 Dynamic characteristicAnalog I/O pinsDP/DM........................ 16
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1.0 Introduction
1.1 Description
AU6390 is a single chip for USB2.0 high-speed transmission controller, which is designed as a bridge between USB host and ATA/ATAPI storage device, such as hard disk, CD-ROM, CD-R/W, DVD-ROM, DVD-R/W, etc. With AU6390, users can transfer huge digital data between ATA/ATAPI storage device and PC or other electronic devices. Furthermore, AU6390 can perform speed negotiation in PIO mode 0~4 and Ultra DMA mode 2/4 with the down-streaming storage device to achieve the best performance and compatible capability.
1.2 Features
Support USB V2.0 specification and USB Device Class Definition for Mass Storage, Bulk-Transport V1.0 Support ATA/ATAPI-6 specification Revision 1.0 PIO mode 0~4 UDMA mode 2/4 Support for a single ATA/ATAPI device configured either as master or slave device Support 48-bit addressing for LBA hard drives Support partition segment for a single ATA/ATAPI device Alcor DMA engine integrated for performance enhancement Work with default driver from Windows ME/2000/XP and Mac OS X; Windows 98/2000(SP1/SP2) and Mac OS 9 are supported by vendor driver from Alcor. LEDs for USB awake/suspend and data transferring 3.3V operation self-powered device 48pin LQFP package
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2.0 Application Block Diagram
Following is the application diagram of a typical removable USB2.0 ATA/ATAPI product. Users can exchange the digital content between ATA/ATAPI device and PC (Notebook).
2.1 Block Diagram
PC with USB Host Controller
HD
AU6390
CD-ROM, CD-R/W DVD-ROM, VCD-R/W
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3.0 Pin Assignment
The AU6390 is packed in 48pin-LQFP-form factor. The following figure shows signal name for each pin and the table in the following page describes each pin in detail. Figure 3.1 Pin Assignment Diagram
ATADMACKN ATADATA15 ATADATA14 ATADATA13 ATADMARQ 48 ATAAD0 ATAAD1 ATAAD2 ATACS0N ATACS1N ATARESETN RPU AVDD DP DM AVSS RREF 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PVDD ATADIOWN 47 XI ATADIORN 46 XO ATAIORDY 45 PVSS ATAINTRQ
GND
VDD
44
43
42
41
40
39
38
37 36 ATADATA11 ATADATA10 ATADATA9 ATADATA8 ATADATA7 ATADATA6 ATADATA5 ATADATA4 ATADATA3 ATADATA2 ATADATA1 ATADATA0
35
34
33
32
ALCOR MICRO AU6390 48PIN LQFP
31
30
29
28
27
26
25
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VDD25V
VDDH
VSSH
ChipResetN
GPON7
EEPDATA
EEPCLK
GPI3
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Table 3.1 Pin Descriptions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin Name ATAAD0 ATAAD1 ATAAD2 ATACS0N ATACS1N ATARESETN RPU AVDD DP DM AVSS RREF PVDD XI XO PVSS VDD25V VDDH VSSH ChipResetN GPON7 EEPDATA EEPCLK GPI3 I/O O O O O O O I I I/O I/O PWR I I I O PWR O I PWR I O I/O I/O I ATA Address select 0 ATA Address select 1 ATA Address select 2 ATA Chip Select 0 ATA Chip Select 1 ATA Reset Connected with an 1.5k pull up resistor to AVDD Analog power 3.3V USB DP USB DM Analog ground Connected an 1k resistor to A GND for impedance match OSC power 3.3V 12 MHz crystal input. 12 MHz crystal output. OSC ground 2.5V output connect to core power 3.3V for IO pad IO ground 3.3V Chip Reset, must be pull up with RC. Device LED EEPData EEPCLK General Purpose Input.
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Description
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Pin # 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Pin Name ATADATA0 ATADATA1 ATADATA2 ATADATA3 ATADATA4 ATADATA5 ATADATA6 ATADATA7 ATADATA8 ATADATA9 ATADATA10 ATADATA11 ATADATA12 ATADATA13 ATADATA14 ATADATA15 VDD GND ATAINTRQ ATADMACKN ATAIORDY ATADIORN ATADIOWN ATADMARQ
I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O PWR PWR I O I O O I ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus ATA Data Bus Core power 2.5V Core ground
Description
ATA Interrupt request ATA Control Signal DMACKN ATA Control Signal IORDY ATA Control Signal DIORN ATA Control Signal DIOWN ATA Control Signal DMARQ
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4.0 System Architecture and Reference Design
4.1 AU6390 Block Diagram
Figure 4.1 AU6390 Block Diagram
USB
USB Upstream Port
XCVR
SIE
RAM
ATA Control FIFO
ATA
2.5 V
Processor
ROM
Arbitrator
2.5V Voltage Regulator /Power Switch
3.3V
12MHz XTAL
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5.0 Electrical Characteristics
5.1 Absolute Maximum Ratings
Table 5.1 Absolute Maximum Ratings SYMBOL VCC VIN VOUT TSTG PARAMETER Power Supply Input Voltage Output Voltage Storage Temperature RATING -0.3 to VCC+0.3 -0.3 to 3.6 -0.3 to VCC+0.3 -40 to 150 UNITS V V V
O
C
5.2 Recommended Operating Conditions
Table 5.2 Recommended Operating Conditions SYMBOL VCC VDD VIN TOPR PARAMETER Power Supply Digital Supply Input Voltage Operating Temperature MIN 3.0 2.25 0 0 TYP 3.3 2.5 3.3 25 MAX 3.6 2.75 5.2 125 UNITS V V V
O
C
5.3 Leakage Current and Capacitance
Table 5.3 General DC Characteristics SYMBOL IIN IOZ CIN COUT CBID PARAMETER Input current Tri-state leakage current Input capacitance Output capacitance Bi-directional buffer capacitance Pad Limit Pad Limit Pad Limit CONDITIONS no pull-up or pull-down MIN -10 -10 TYP 1 1 2.8 2.8 2.8
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MAX UNITS 10 10 A A F F F
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5.4 DC Electrical Characteristics of 3.3V I/O Cells
Table 5.4 DC Electrical Characteristics of 3.3V I/O Cells Limits SYMBOL PARAMETER CONDITIONS MIN TYP VCC Vil Vih Vol Voh Rpu Rpd Iin Ioz Power supply Input low voltage LVTTL Input high voltage Output low voltage Output high voltage Input pull-up resistance Iol=2~16mA Ioh=2~16mA PU=high, PD=low 2.4 40 40 -10 -10 75 75 1 1 190 190 10 10 2.0 0.4 V V V K K A A 3.3V I/O 3.0 3.3
MAX 3.6 0.8
UNIT V V
Input pull-down resistance PU=low, PD=high Input leakage current Tri-state output leakage current Vin= VCC or 0
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5.5 USB Transceiver Characteristics
Table 5.5 Electrical characteristics Symbol AVCC VCC ICC Parameter Analog supply voltage Digital supply voltage Operating supply current High speed operating at 480 MHz In suspend mode, current with 1.5k Suspend supply current pull-up resistor on pin RPU disconnected Conditions Min. 3.0 2.25 Typ. 3.3 2.5 Max. 3.6 2.75 73 Unit V V mA
ICC(susp)
120
A
Table 5.6 Static characteristicDigital pin Symbol Parameter Conditions Input levels VIL VIH Low-level input voltage High-level input voltage Output levels VOL VOH Low-level output voltage High-level output voltage VCC-0.2 0.2 V V 2.0 0.8 V V Min. Typ. Max. Unit
AVCC=3.0V~3.6VVCC=2.25V~2.75VTemp=0~115
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Table 5.7 Static characteristicAnalog I/O pinsDP/DM Symbol Conditions Min. USB2.0 TransceiverHS Input Levelsdifferential receiver VIDP-VIDM High speed differential measured at the 300 input sensitivity connection as application circuit High speed data signaling common mode voltage -50 range High speed squelch detection threshold High speed disconnection detection threshold Squelch detected No squelch detected Disconnection detected Disconnection not detected Output Levels 150 625 525 Parameter Typ. Max. Unit
VHSDIFF
mV
VHSCM
500 100
mV mV mV mV mV
VHSSQ
VHSDSC
VHSOI VHSOL VHSOH VCHIRPJ VCHIRPK
High speed idle level output voltage(differential) High speed low level output voltage(differential) High speed high level output voltage(differential) Chirp-J output voltage differential Chirp-K output voltage differential
-10 -10 -360 700 -900
10 10 400 1100 -500
mV mV mV mV mV
RDRV
VTERM
VDI VCM
Resistance Equivalent resistance 3 used as internal chip only Driver output impedance Overall resistance 40.5 including external resistor Termination Termination voltage for 3.0 pull-up resistor on pin RPU USB1.1 TransceiverFS/LS Input Levelsdifferential receiver Differential input VIDP-VIDM 0.2 sensitivity Differential common 0.8 mode voltage Input Levelssingle-ended receivers to ATA/ATAPI Bridge Controller V0.9W
6 45
9 49.5
3.6
V
V 2.5 V
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VSE VOL VOH
Single ended receiver threshold Output levels Low-level output voltage High-level output voltage
0.8 0 2.8
2.0 0.3 3.6
V V V
AVCC=3.0V~3.6VVCC=2.25V~2.75VTemp=0~115 Table 5.8 Dynamic characteristicAnalog I/O pinsDP/DM Symbol Parameter Conditions Driver Characteristics High-Speed Mode tHSR tHSF High-speed differential rise time High-speed differential fall time Full-Speed Mode tFR tFF tFRMA VCRS CL=50pF10 to 90 ofVOH-VOL CL=50pF90 to 10 Fall time ofVOH-VOL Excluding the first Differential rise/fall time transition from idle matchingtFR / tFF mode Excluding the first Output signal crossover transition from idle voltage mode Rise time Low-Speed Mode tLR CL=200pF-600pF 10 to 90of Rise time VOH-VOL CL=200pF-600pF 90 to 10of Fall time VOH-VOL Excluding the first Differential rise/fall time transition from idle matchingtLR / tLF mode Excluding the first Output signal crossover transition from idle voltage mode High-level output voltage 75 300 ns 4 4 90 1.3 20 20 110 2.0 ns ns 500 500 ps ps Min. Typ. Max. Unit
V
tLF
75
300
ns
tLRMA VCRS VOH
80 1.3 2.8
125 2.0 3.6
V V
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6.0 Mechanical Information
Figure 6.1 Mechanical Information Diagram
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7.0 Abbreviations
This chapter lists and defines terms and abbreviations used throughout this specification. SIE ATA UTMI Serial Interface Engine Advanced Technology Attachment USB Transceiver Macrocell Interface
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MEMO
About Alcor Micro, Corp Alcor Micro, Corp. designs, develops and markets highly integrated and advanced peripheral semiconductor, and software driver solutions for the personal computer and consumer electronics markets worldwide. We specialize in USB solutions and focus on emerging technology such as USB and IEEE 1394. The company offers a range of semiconductors including controllers for USB hub, integrated keyboard/USB hub and USB Flash memory card reader...etc. Alcor Micro, Corp. is based in Taipei, Taiwan, with sales offices in Taipei, Japan, Korea and California. Alcor Micro is distinguished by its ability to provide innovative solutions for spec-driven products. Innovations like single chip solutions for traditional multiple chip products and on-board voltage regulators enable the company to provide cost-efficiency solutions for the computer peripheral device OEM customers worldwide.
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